1. Field of the Invention
The present invention relates to a compound semiconductor field effect transistor with an enhanced drain current-voltage characteristics.
2. Description of the Prior Art
FIG. 1 is a diagrammatic representation showing a conventional field effect transistor of a gallium arsenide schottky barrier type having a typical n-type conductive layer (GaAs MESFET). In the MESFET, on a semiconductor GaAs substrate 15 formed are an undoped buffer layer or i-layer 16 and an n-type conductive layer or n-layer 4, and a part of the n-layer 4 in the vicinity of a gate region is removed by etching to form a recess. Further, in the recess a schottky gate electrode 6 is formed, and on the n-layer 4 outside the recess, an ohmic source electrode 7 and a drain electrode 8 are formed. Also, on a rear side, for example, a layer of Au 10 is formed, and a rear-side electrode is grounded.
In the conventional FET, when a drain voltage is increased, as described in, for example "Light Emission and Burnout Characteristics of GaAs Power MESFET's" of IEEE Transactions on Electron Devices, Vol. ED-25, No.6, Jun. 1978, pp 567-573, a high electric field is generated at end portions of the recess. Also, in the vicinity of the end portions of the recess, a drain current is concentrated. The problem is that destruction is caused by high electric field and high current.